1. Field of the Invention
The present invention generally relates to the manufacture and repair of multi-chip modular electronic devices and, more particularly, to apparatus for removing one or more chips from a multi-chip module without damage to the chip or module substrate and at lowest possible temperatures of the chip and module.
2. Description of the Prior Art
The demand for higher logic circuit and digital signal processor speed and complexity has required the development of packaging techniques and structures which can form extremely complex interconnections between a plurality of integrated circuit chips which are, themselves, often highly complex devices. In particular, a module formed of layers of ceramic or polymer material having conductive patterns thereon and conductor-filled holes or vias formed therein for making layer-to-layer connections has become well-known. In such a module, the layers are stacked with high accuracy of registration and fused or sintered to form a unitary structure on which a plurality of chips may be mounted. The number of chips which are interconnected in such a modular package can often number well in excess of one hundred.
Clearly, in such complex devices, many possibilities are presented for the production of minor defects. At the present state of the art, it is considered most cost-effective to test such modules at various stages of manufacture and to repair or provide alternative connections at any point where testing reveals any portion of the device to be functionally questionable or marginal. For example, where a wiring connection may be found to have an increased resistance or a reduced resistance path to another portion of the circuit, the design of the module is made such that virtually any portion of the wiring can be disconnected and an alternative connection made. Such a repair, referred to as an engineering change (EC), results in a high manufacturing yield of devices which are of high reliability and highly uniform functionality.
Of course, the functionality of any such module depends, in large part, on the functionality of the integrated circuit chips mounted thereon. The chip need not be defective, itself, to engender marginal functionality since effects such as parasitic capacitances and capacitive coupling of portions of the chip either to itself or other portions of the module when the chip is mounted thereon can alter propagation time through circuits on the chip. Random variation in such propagation times may make certain individual chips incompatible with other individual chips when installed in a particular module. For that reason, it is sometimes necessary to remove a chip from a module for replacement. It is also often necessary to remove a chip from a module to complete a diagnostic analysis of a module in which some aspect of functionality is questionable.
Therefore, it is not unusual for a particular chip or a plurality of chips to be removed from a module and either replaced or reinstalled a relatively large number of times during the manufacture of a module. Since the chips are generally attached to the module by solder connections (generally made by melting solder bumps, known as C4's, which are connection pads already on the chip to connection pads on the module by heating the entire assembly) which provide both electrical connections and mechanical support, removal of one or more or even all of the chips from a module is essentially a desoldering operation involving the application of heat, mechanical separation of the chip and module and removing molten solder from the joint. This process is costly and time-consuming and may subject the chip and/or the module to temperatures which can cause degradation of or damage to either or both.
For example, the current method of choice, prior to the present invention, for chip removal involves application of heat by focussing an infra-red beam from a lamp source through an aperture onto the back of the chip to heat the chip and the solder connections. The semiconductor material in the chip (e.g. silicon) is relatively transparent to such long wave length light and heating of the solder connections proceeds fairly rapidly. However, doped regions of the semiconductor chip are less transparent and are thus differentially heated both by impingement of the infra-red energy and by radiation and conduction from the solder connections, particularly since such doped regions are generally formed closer to the connection side of the chip. Further, metal connections are not transparent but reflective and have high thermal conductivity. Metal connections are also usually connected to highly doped regions of semiconductor material. Therefore, due to several of these mechanisms, substantial temperature gradients may be caused within the semiconductor chip.
Since doped semiconductor regions are also diffusion sources for impurities when temperatures are raised above 350.degree. C. and are, at the same time, subject to being heated to a greater degree than the remainder of the chip, it can be readily appreciated that the chip, itself, is subjected to potentially damaging conditions in order to produce a temperature of 330.degree. C. (a typical solder melting point) at the solder connections. In fact, temperatures often in excess of 450.degree. C. are caused within the chip in order to perform the desoldering operation and are substantially uncontrollable and unpredictable within a chip. Process sensitivity is very high since the likelihood of damage to the chips increases dramatically above 450.degree. C.
A temperature of 450.degree. C. is sufficient to cause some degree of annealing of the metal in the chip and consequent changes in dimension and other physical properties of both the metal and semiconductor materials. Further, substantial temperature gradients may mechanically damage the semiconductor and/or insulator structures therein at such temperatures particularly due to localized stresses from differential thermal expansion. Accordingly, manufacturing yield may be reduced due to damage to or change of performance characteristics of the chips (including difficulties in diagnostics caused by inconsistency of performance of particular chips) and time and cost required for repair of modules is increased.
Additionally, it should be noted that removal of large chips using current or projected technologies cannot be done by this infra-red focussing process. Further, since these processes are highly automated and chips of various sizes must be accommodated for each module design, the "hot" chip removal technique described above is particularly capital intensive; which increased costs must usually be amortized over smaller production runs of a particular design.
Several so-called "cold" chip removal processes are also known and widely practiced; generally for low-end products using relatively mature technologies. These techniques include such techniques as tensile pull, torque removal and ultrasonic chip removal. However, since these techniques at least rely on either a "brute force" mechanical action or subject the chips to high acceleration loading, damage to the chip, particularly the bottom layer metallurgy (BLM) and/or module is relatively common. These "cold" chip removal techniques also do not provide for removal of excess solder.
Accordingly, a need exists in which the desoldering operation for chip removal may be done at low cost, high reliability and without criticality or difficulty of control and maintenance of process conditions and in which temperature and mechanical forces applied to the chips and/or the module can be easily limited to levels far below those involved in previously known processes.